This generator is intended to be used by companies developing closely coupled Hardware and Software, involving many complex interfaces between different disciplines.

R2A takes as its only input a set of files defining the structure of Register Files of VLSI blocks and generates:

• Verilog code for the registers (flip-flops, read-write logic, and more)
• C++ code for software drivers
• ‘e’ Verification language code for accessing the registers
• MS Word documentation of the interfaces

Needless to say, by using this generator, software-hardware integration time is reduced to virtually nothing.

Example

Let's say that we want to create a new chip named "NuChip". The functionality NuChip needs to implement is addition and subtraction of two 8-bit integer numbers.

So, the first thing we need to do is design an ALU.

Now the fun part begins: usually, the workflow in this sort of project is as follows:

• The VLSI Designers design the ALU, write the code (Verilog / VHDL), come up with some documentation and then pass it to the Verification and Software Engineers
• The Verification and Software Engineers will read the documentation, implement the drivers and tests
• When finally the Hardware is available for integration and testing (either a simulation or the actual Hardware), this is where it gets really painful for everyone...

During the integration and testing phases many bad things may occur. Here are a few (extremely irritating and time consuming) examples:

• Documentation was outdated, so the Software tries to access the wrong registers / bits
• Documentation was incomplete, so the Software tries to write to a read-only register
• A Register or even an entire block needs to be moved to a different address
• A Register needs to be renamed or repurposed, maybe changing its read-write properties

Let's see what is required to make Hardware and Software development much more easy with R2A:

• Create an XML which defines the 8 bit ALU Hardware block. This part is owned by the Hardware Designer and it contains registers definitions like: offset, name, code generation directives, etc.
• Create an XML which defines our system, which in our case is the NuChip. This part is owned by the Hardware Architect and it contains the mapping of blocks and addresses ("Chip Select").
• Run R2A - this will create software and hardware code, verification code and MS Word documentation.
• Integrate with your environment.